operating system unit two notes

2. COMPUTER SYSTEM STRUCTURES

COMPUTER SYSTEM OPERATION
1. I/O devices & the CPU can execute concurrently.
2. Each device controller is in charge of particular device type.
3. Each device controller has a local buffer.
4. CPU moves data from/to main memory to/from local buffers.
5. I/O is from the device to local buffer of controller.
6. Device controller informs CPU that it has finished its operation by causing an interrupt.

COMMON FUNCTIONS OF INTERRUPTS

1. INTERRUPT TRANSFERS CONTROL TO THE INTERRUPT SERVICE ROUTINE RENERALLY, THROUGH THE INTERRUPT VECTOR, WHICH CONTAINS THE ADDRESSES OF ALL THE SERVICE ROUTINES.
A.. Interrupt architecture must save the address of the interrupted instruction.
B. Incoming interrupts are disabled while another interrupt is being processed to prevent a lost interrupt.
C. An OS is interrupt driven.
D. A trap is a software generated interrupt caused either by an error (for example divide by zero or invalid memory access) or a user request.
INTERRUPT HANDLING
1. The OS preserves the state of the CPU by storing registers & the program counter value when interrupt occurs.
2. Determines which type of interrupt has occurred:
1. Polling
2. Vectored interrupt system
3. Separate segments of code determine what action should be taken for each type of interrupt.
STORAGE STRUCTURE
1. MAIN MEMORY – storage media that the CPU can access directly.
2. SECONDARY STORAGE- extension of main memory that provides large nonvolatile storage capacity.
3. MAGNETIC DISK- Rigid metal or glass platters covered with magnetic recording material.
4. Disk surface is logically divided into tracks, which are subdivided into sectors.
5. The disk controller determines the logical interaction between the device & the computer.
MOVING HEAD DISK MECHANISM



STORAGE HIERARCHY
1. Storage systems organized in hierarchy.
1. Speed
2. Cost
3. Volatility
2. CACHING- copying information into faster storage system, main memory can be viewed as a last cache for secondary storage.
STORAGE DEVICE HIERARCHY





As we move from top to bottom access increases whereas per unit cost decreases.
CACHING
 USE OF HIGH SPEED MEMORY TO HOLD RECENTLY ACCESSED DATA.
 Requires a cache management policy.
 Caching introduces another level in storage hierarchy. This requires data that is simultaneously stored in more than one level to be consistent.
MIGRATION OF A FROM DISK TO REGISTER


HARDWARE PROTECTION
 DUAL MODE OPERATION
 I/O PROTECTION
 MEMORY PROTECTION
 CPU PROTECTION

DUAL MODE OPERATION
 SHARING SYSTEM RESOURCES REQUIRES OS TO ENSURE THAT AN INCORRECT PROGRAM CANNOT CAUSE OTHER PROGRAMS TO EXECUTE INCORRECTLY.
 Provide hardware support to differentiate between at least two modes of operations.
1. User mode- execution done on behalf of a user.
2. Monitor mode (also kernel mode or system mode)- execution done on behalf of OS
 Mode bit added to computer hardware to indicate the current mode: monitor (0) or user (1).
 When an interrupt or fault occurs hardware to switches to monitor mode.
 Privileged instruction can be issued only in monitor mode.

I/O PROTECTION
 All I/O instructions are privileged instructions.
 Must ensure that a user program could never gain control of the computer in monitor mode (i.e a user programs that, as part of its execution, stores a new address in the interrupt vector).
 User can not issue I/O instruction directly.
MEMORY PROTECTION
 Must provide memory protection at least for the interrupt vector & the interrupt service routines.
 In order to have memory protection, add two registers that determine the range of legal addresses a program may access.
1. BASE REGISTER: holds the smallest legal physical memory address.
2. LIMIT REGISTER: contain the size of the range.
 Memory outside the defined range is protected.
USE OF A BASE & LIMIT REGISTER





HARDWARE ADDRESS PROTECTION




HARDWARE PROTECTION
 When executing in monitor mode, the OS has unrestricted access to both monitor & user’s memory.
 The load instructions for the base & limit registers are privileged instructions.
CPU PROTECTION
 TIMER- interrupts computer after specified period to ensure OS maintains control.
1. Time is decremented every clock tick.
2. When timer reaches the value 0, an interrupt occurs.
 Timer commonly used to implement time sharing.
 Time also used to compute the current time.
 Load time is a privileged instruction.